Aqua La Scala MkIII NOS/Tube USB DAC Aqua’s Ladder

The ‘concept DAC’ at the heart of the La Scala was debuted in Aqua’s Formula xHD [HFN Apr ’20]. Here a discrete precision-matched resistor ladder network is used to convert ‘bits’ into sequential steps of current – these are the rows of the smallest surface-mount chip components seen in the picture [below]. In this FPGA-based R-2R DAC the LSB (Least Significant Bit) is represented by the smallest current source, with each subsequent ‘bit’ twice the output of the last (a ratio of 1:65,536 over 16-bits). In practice, Aqua’s latest (MkIII) DAC PCB employs 92 chip resistors sequenced through a bank of eight 8-bit shift registers per channel [see picture below].

These networks run at native sampling rates, ie, with no up- or oversampling or digital filtering, so there’s no pre- or post-transient ringing and minimal time domain distortion [see Graph, below]. On the other hand, no filtering means no attenuation of aliasing distortions (mirror-images of the audio signals ‘reflected’ back from the sample rate frequency).

Subjectively, this is a bigger issue with lower (44.1kHz/48kHz) sample rates [see PM's Lab Report] where the frequency response also rolls away through the treble from –0.7dB/10kHz to –2.3dB/20kHz [black trace, inset Graph]. Higher sample rates push aliasing out to higher frequencies – a good thing – where the response extends to –0.3dB/20kHz and –7.0dB/45kHz with 96kHz files [blue trace] and +0.2dB/20kHz, –4.5dB/45kHz and –21dB/90kHz with 192kHz media [red trace]. PM

COMPANY INFO
AQ Technologies S.r.l.
Milan, Italy
Supplied by: Elite Audio Ltd, Fife
Telephone: 01334 570 666
ARTICLE CONTENTS

X